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2007年08 期
| 标题 |
| RS编码器的FPGA设计和实现 (43 卷) |
| 英文标题 |
| 摘要 |
| RS码是一种线性分组循环码，具有极强的随机错误和突发错误纠正能力。基于有限域乘法算法，设计了一种RS（128，124）编码器，同时给出了编码器的仿真结果，并进行了FPGA硬件仿真验证。 |
| 作者 |
| 新闻作者:王胜军，张思东 |
| 关键字 |
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| 标题 |
| RS编码器的FPGA设计和实现 (43 卷) |
| 英文标题 |
| 摘要 |
| RS码是一种线性分组循环码，具有极强的随机错误和突发错误纠正能力。基于有限域乘法算法，设计了一种RS（128，124）编码器，同时给出了编码器的仿真结果，并进行了FPGA硬件仿真验证。 |
| 作者 |
| 新闻作者:王胜军，张思东 |
| 关键字 |
| COPYRIGHT©2001-2025 CHINA ACADEMY OF RAILWAY SCIENCES CORPORATION LIMITED，ALL RIGHTS RESERVED | ||
|
